This document defines the standardized pipeline for transitioning from hand-drawn circuit concepts to manufacturing-ready hardware packages within the Nexus Vault.
All new hand-drawn sketches or conceptual diagrams MUST be placed in:
../../ingestion/raw
The automated ingestion pipeline (governed by the wiki-content-manager skill) monitors this directory. Upon detection:
sketches/ subdirectory (e.g., keystone/sketches/).power-regulator-v1.jpg).Translates the visual sketch into electrical physics.
.cir / .net (SPICE Netlist): Generated text-based circuit description..raw / .log (Simulation Output): Output from local SPICE engine (e.g., NGSpice). Used for automated performance validation.Translates validated physics into formal CAD files. KiCad formats are preferred due to their plain-text structure.
.kicad_sch (KiCad Schematic): Contains symbols, nets, and electrical connections..kicad_pcb (KiCad PCB Layout): Contains physical board dimensions, footprint placements, and trace routing.Exported via KiCad CLI as a standardized manufacturing archive.
.gbr): Universal vector images for every board layer (Copper, Solder Mask, Silkscreen)..drl / .xln): Excellon-formatted CNC coordinates for holes and vias.Text documents generated for PCBA (Assembly) and part sourcing.
BOM.csv (Bill of Materials): Shopping list mapping schematic labels to Manufacturer Part Numbers (MPNs).CPL.csv (Component Placement List): coordinates for pick-and-place automated assembly.pcbway-6mil.kicad_dru) before export..cir, .kicad_sch, .kicad_pcb) MUST be tracked in Git to provide a full audit trail from sketch to silicon.[project-root]/
βββ sketches/
β βββ circuit-v1.jpg <-- From ingestion/raw/
βββ simulation/
β βββ circuit.cir
β βββ simulation.log
βββ hardware/
β βββ project.kicad_sch
β βββ project.kicad_pcb
βββ export/
βββ project-gerbers.zip
βββ BOM.csv
βββ CPL.csv